芯片工艺工程师岗位职责
芯片工艺工程师上海奕见企业管理咨询有限公司上海奕见企业管理咨询有限公司,奕见咨询,奕见工作职责
1)Processdevelopandcontinueimprove,Setupprocessrequirement
2)Processwindowenlarge
3)Newtoolevaluation
4)Cycletimereductionandcostdown
5)Maintainprocessstable
任职资格
1.AdvancedunderstandingofTF、Littho、Wet、DIff、Etch、CMP、processes.
2.MustpossessstrongengineeringknowledgeofPhotoequipment,including:Scanner/Trackandmaterials.
3.Proficientinstatistics,dataanalysis,DesignofExperiments(DOE).Understandingofopticsincludingtheprinciplesandapplicationofimmersionlithography,polarizedillumination.
篇2：芯片物理设计工程师岗位职责
芯片物理设计工程师九州华兴集成电路设计(北京)有限公司九州华兴集成电路设计(北京)有限公司,九州华兴,九州华兴WorkwithFrond-EnddesignteamandPhysicaldesignteamforlargescaleASICchipphysicalimplementation(HierarchicalDesign).Includetoplevelphysicalpartition,blocksizingandshaping,blockportassignment,powerplanning,top/blocklevelP&Rimplementation.
Workforprojecthighqualityandontimedelivery.
Responsibilities:
1.ResponsibleforVerilogtoGDSimplementation,powersignoff,areaEvaluation,Timingclosure,STA,Physicalverification
2.ExperiencedinEDAtools(e.g.Synopsys,Candence,Mentoretc)
3.Criticalissueresolveontopcongestionortimingissues.
4.Betterbeexpertononeormoreaspectlike:clocktreesynthesis/power/physicalverification.
SkillsandKnowledge:
1.Goodknowledgeforsynthesis,floorplan,place-and-route,timingclosure,DFM,DFT,poweranalysis,Signalintegrityanalysis,Hierarchicalflow
2.Goodatusingscriptprocessing.(TCL、Perl……)
3.Projecttapeoutexperienceisneeded
4.28nmandbeyond(advancednode)tapeoutexperienceisagoodplus.
5.Strongverbalcommunicationandinterpersonalskillstoworkcloselywithavarietyofindividual
6.Teamworkspirit
Qualifications
EducationandExperience
MSEEwith3+yearsorBachelorwith5+ofindustrialexperienceofdeepsubmicrondigitalASICdesign.
篇3：芯片设计验证工程师岗位职责
芯片设计验证工程师瀚芯咨询上海瀚芯商务咨询有限公司,瀚芯咨询,瀚芯SOC芯片设计验证工程师ASICVerificationEngineer
Position:ICDesignVerificationEngineer,orabovelevel
Location:Shanghai
Responsibilities:
-Understandingtheexpectedfunctionalityofdesigns.
-Developingtestingandregressionplans.
-VerificationwithVerilog/SystemVerilog/UVM
-SetupverificationtestbenchinmodulelevelandChiplevel,defineandexecuteverificationplanwithfullfunctionalcoverage.
-Designinganddevelopingverificationenvironment.
-RunningRTLandgate-levelsimulations/regression.
-Code/functionalcoveragedevelopment,analysisandclosure.
Requirements:
-ICverificationskillsandbasicknowledgeoflogicandcircuitdesign,goodcommunicationandproblemsolvingskills.
-SystemVerilog,VMM/OVM/UVMverificationmethdology.
-industrystandardASICdesignandverification
-Master'sdegreewith5+yearsofexperience
制度专栏
